Johnny K.O. SIN (PhD, Toronto, 1988)





*        Brief Profile

Johnny K. O. Sin was born in Hong Kong. He received the B.A.Sc., M.A.Sc., and Ph.D. degrees in electrical engineering from the University of Toronto, Toronto, ON, Canada, in 1981, 1983, and 1988, respectively.

From 1988 to 1991, he was a Senior Member of the research staff of Philips Laboratories, NY, working on power devices and ICs. In August 1991, he joined the Department of Electronic and Computer Engineering, the Hong Kong University of Science and Technology (HKUST), Kowloon, Hong Kong, where he has been a Full Professor since 2001. He is one of the founding members of the department and has served as the Director of the Undergraduate Studies Program in the department from 1998 to 2004. He was the Director of the Nanoelectronics Fabrication Facilities from 2003 to 2012, and has been the director of the Semiconductor Product Analysis and Design Enhancement Center, HKUST, since 2001. He is the holder of 13 patents, and the author of more than 260 papers in technical journals and refereed conference proceedings. His research interests include microelectronic and nanoelectronic devices and fabrication technology, particularly novel power semiconductor devices and ICs, and system-on-a-chip applications using power transistors, thin-film transistors, silicon-on-insulator radio-frequency devices, and silicon-embedded magnetic devices.

Dr. Sin was an Editor for the IEEE ELECTRON DEVICES LETTERS from 1998 to 2010. He was an elected member of the Electron Devices Society (EDS) Administrative Committee from 2002 to 2005 and is a member of the Power Devices and IC’s Technical Committee of the IEEE EDS since 1998. He is also a Technical Committee member of the International Symposium on Power Semiconductor Devices and IC’s (ISPSD) since 1999. He was the recipient of the Teaching Excellence Appreciation Award from the School of Engineering, HKUST, in Fall 1998. He is a Fellow of the IEEE for contributions to the design and commercialization of power semiconductor devices.



*        Honours and Awards


2012                Fellow of IEEE

2006 June        Honorary Visiting Professor, Southeast University , Nanjing, China

1998 Fall          Teaching Excellence Appreciation Award, School of Engineering, HKUST

1996 June        Honorary Visiting Professor, Dalian University of Technology, Dalian, China

1991-1992       Invention Incentive Awards, Philips Laboratories, U.S.A.

1983-1987       Graduate Open Fellowships, University of Toronto

1981-1983       MacAllister Scholarships, University of Toronto

1977                Ontario Scholar Award, Ontario, Canada



*        Research Interests

Microelectronic and nanoelectronic devices and fabrication technology, particularly novel power semiconductor devices and ICs, and system-on-a-chip applications using power transistors, thin-film transistors, silicon-on-insulator radio-frequency devices, and silicon-embedded magnetic



*        Current Research Projects

2012-2014       Novel Design of 1200V-class IGBT Devices


2010-2012       3-Dimensional Transformer Devices for Digital Isolator Applications


2008-2011             A Fast Switching Insulated-Gate Bipolar Transistor with a Novel Collector


2008-2010             Low Voltage Trench-Gate Power MOSFET Technology


2007-2008             Semiconductor Transformer


2006-2009       A Novel Isolation Structure for Excellent Electrical Isolation and Thermal Dissipation


2005-2008             Metal Gate Power MOSFETs for Fast Switching Applications


2004-2006       Improved Gate Structure Trench Vertical Double-Diffused MOS Transistor


2003-2005       The Establishment of Hong Kong Integrated Circuit (IC) Development Support Center


2003-2005             A Fully Integrated CMOS High Voltage Compatible RF MEMS Technology



*        Selected Publications


Recent Journal Publications



[1]        R..Wu, S. Raju, M. Chan, J.K.O. Sin, and C.P. Yue, "Silicon-Embedded Receiving Coil for High-Efficiency Wireless Power Transfer to Implantable Biomedical ICs," IEEE Electron Devices Letters, Vol. 34, No. 1, pp. 9-11, Jan. 2013.


[2]        R..Wu and J.K.O. Sin, "High Efficiency Silicon-Embedded Coreless Coupled Inductors for Power Supply-on-Chip Applications", IEEE Transactions on Power Electronics, Vol. 27, No. 11, pp. 4781-4787, Nov. 2012.


[3]        Xianda Zhou, Jacky C.W. Ng and J.K.O. Sin, "UIS Analysis and Characterization of the SONOS Gate Power MOSFET", IEEE Transactions on Electron Devices, Vol. 59, No. 2, pp. 408-413, 2012.


[4]        Xianda Zhou, Jacky C.W. Ng and J.K.O. Sin, "A Novel SONOS Gate Power MOSFET with xcellent UIS Capability", IEEE Electron Device Letters, Vol. 32, No. 10, pp. 1415-1417, 2011.


[5]        J.C.W. Ng, J.K.O. Sin, H. Sumida, Y. Toyoda , A. Ohi, H. Tanaka, T. Nishimura, K. Ueno, “A novel low-voltage trench power MOSFET with improved avalanche capability”, 22nd International Symposium on Power Semiconductor Devices & IC’s (ISPSD), Hiroshima, Japan, pp. 201-204, 6-10 June 2010.


[6]        J.C.W. Ng, J.K.O. Sin, H. Sumida, Y. Toyoda , A. Ohi, H. Tanaka, T. Nishimura, K. Ueno, “A New Trench Power MOSFET With an Inverted L-Shaped Source Region”, IEEE Electron Device Letters, vol. 31, no. 11, 2010.


[7]        Jingmeng Sun, Frank X.C. Jiang, Lingpeng Guan, Zhibin Xiong, Guizhen Yan, and J.K.O. Sin, “A New Isolation Technology for Automotive Power Integrated Circuit Applications”, IEEE Trans. on Electron Devices, Vol. 56, No. 9, pp. 2144-2149, Sept. 2009.


[8]        Jacky C.W. Ng and J.K.O. Sin, “A Low Voltage Planar Power MOSFET with a Segmented JFET Region”, IEEE Trans. on Electron Devices, Vol. 56, No. 8, pp. 1761-1766, Aug. 2009.


[9]        Jacky C.W. Ng, J.K.O. Sin, and L. Guan, “A Novel Planar Power MOSFET with Laterally-uniform Body and Ion-implanted JFET region”, IEEE Electron Device Letters, Vol. 29, No. 4, pp. 375-377, 2008.


[10]       L. Guan and J.K.O. Sin, “Transient Characterization of the Planar DMOS with a Metal/Poly-Si Replacement Gate”, IEEE Trans. on Electron Devices, Vol. 54, No. 7, pp. 1789-1792, July 2007.


[11]        L. Guan and J.K.O. Sin, “A 30V Self-aligned Metal/poly-Si Replacement Gate Planar DMOS for DC/DC Converters”, IEEE Electron Device Letters, Vol. 27, No. 11, pp. 920-2, Nov. 2006.


[12]        Jacky C.W. Ng and J. K.O. Sin, “Extraction of the Inversion and Accumulation Layer Mobilities in N-Channel Trench DMOSFETs”, IEEE Trans. on Electron Devices, Vol. 53, No. 8, pp. 1914-1921, Aug. 2006.


[13]        L. Guan, J.K.O. Sin, H. Liu, and Z. Xiong, “A Fully Integrated SOI RF MEMS Technology for System-on-a-chip Applications”, IEEE Trans. on Electron Devices, Vol. 53, No. 1, pp. 167-172, Jan. 2006.


[14]      Z. Xiong, H. Liu, C. Zhu, J.K.O. Sin, “A New Polysilicon CMOS Self-Aligned Double-Gate TFT Technology”, IEEE Trans. on Electron Devices, Vol. 52, No. 12, pp. 2629-2633, Dec. 2005.



*        Patents Granted

[1]     J.K.O. Sin, Ron Hui, and Rongxiang Wu, “Monolithic Magnetic Induction Device”, US Patent Application No. 61/344,566, Aug. 23, 2010.


[2]     J.K.O. Sin, Jacky Ng, Hitoshi Sumida, and Takashi Kobayashi, “MOS-Driven Semiconductor Device and Method for Manufacturing”, US Patent Application Pending, 44 pages, 24 figures, Apr. 12, 2010.


[3]     J.KO. Sin and T. Lai, “Power MOSFET and Methods of Making Same (Inverted-T)”, US Patent No. 7,126,197, Power Transistor, Oct. 24, 2006.


[4]     T. Lai and J.K.O. Sin, “Trench DMOS Devices and Methods and Processes for Making Same”, US Patent No. 6,992,352, Power Transistor, Jan. 31, 2006.


[5]     J.K.O. Sin, M. Liu, T. Lai, “Transistor Having Multiple Gate Pads” US Patent No. 6,963,140, Power Transistor, Nov. 8, 2005.


[6]     J.K.O. Sin, M. Liu, T. Lai, “Transistor Having Multiple Gate Pads”, Taiwanese Patent No. I238503, 21, Power Transistor, Aug. 2005.


[7]     G. Yan, P.C.H. Chan, J.K.O. Sin, I.M. Shing, Y.Y. Wang, “Silicon Wet Etching and Methods of Making Same” Chinese Patent No. ZL01118153.2, Microelectronics Fabrication, Dec. 10, 2003.


[8]     W.H. Ki, P.K.T. Mok, and J.K.O. Sin, “Dimmable Electronics Ballast with Phase Control,” US Patent No. 6,172,466, Integrated Circuits, Jan. 9, 2001.


[9]     Alex K.N. Leung, P.K.T. Mok, W.H. Ki, and J.K.O. Sin, “Frequency Compensation Techniques for Low-Voltage Low-Power Multistages Amplifiers,” US Patent No. 6,208,206, Integrated Circuits, March 27, 2001.


[10]   J.K.O. Sin and B.P. Wang, “Double-Gate Race-Track-Shaped Field Emitter Structure,” US Patent No. 5,982,081, Field Emission Display, Nov. 9, 1999.


[11]   J.K.O. Sin and A. Kumar, “Novel Polysilicon Devices and a Method for Fabrication Therefor,” US Patent No. 5,982,004, Thin Film Transistors, Nov. 9, 1999.


[12]   J.K.O. Sin, A. Kumar, and M. Wong, “Conductivity Modulated Polycrystalline Silicon Thin Film Transistors,” US Patent No. 5,869,847, Thin Film Transistors, Feb. 9, 1999.


[13]   J.K.O. Sin, "Lateral Trench Gate Bipolar Transistor", Philips Labs, NY, U.S.A., US Patent No. 5,227,653, Power Transistor, July 13, 1993.


[14]   J.K.O. Sin, B.M. Singer, and S. Mukherjee, "Power Integrated Circuits with Latchup Prevention", Philips Labs, NY, U.S.A., US Patent No. 5,243,214, Circuit and Device Isolation, Sept. 7, 1993.



*        Professional Activities

Date                                         Role


May 25, 1999 – present           IEEE ISPSD Technical Committee Member

Nov 1998 – present Editor       IEEE Electron Device Letters

Jan 15, 1998 – present             IEEE EDS Administrative Committee Member (Power device


Since 1995 – present                Council Member, Sheng Kung Hui Tang Shiu Kin Secondary


Since 1993 – present                Executive Committee Member, St. James Settlement, Hong


Jan 1, 2002 – Dec. 2004          IEEE EDS Administrative Committee Elected Member

Oct. 2001 – Oct. 2006             Engineering Review Panel Member, RGC, HKSAR

Jun 11, 1997                            IEEE ISCAS’97 Section Chair

Aug 30, 1996 – 2001               IEEE ICMTS Technical Committee Member

Nov 9, 1995                            IEEE TENCON'95 Conference Session Chair for Micro-

Systems and Technology

Apr 15 – May 15, 95               IEEE TENCON'95 Conference Paper Reviewer

1995                                        Publicity Chairman, IEEE HKEDM

1993 – 1995                            Treasurer, IEEE EDS H.K. Chapter

1993 – 1998                            Chairman, St. James Settlement Health Club

Since 1987                               Reviewer for IEEE Transactions on Electron Devices

Reviewer for IEEE Electron Device Letters      


*        Thesis Supervised

No.      Student                          Degree      Date           Thesis Title                  


1.         Feng, Hao                      Ph.D.        8/2014       Novel Power Semiconductor Devices

2.         Fang, Xiangmeng           Ph.D.        8/2013       CMOS Compatible Integrated Passive Devices

3.         Zhou, Xianda                 Ph.D.        8/2012       High Performance Low Voltage Power MOSFET

4.         Peng, Lulu                      Ph.D.        8/2012       A High Performance, High Frequency Integrated Inductor with CMOS Compatible Magnetics

5.         Wu, Ruxiang                  Ph.D.        12/2010     A Novel Power-Supply-on-Chip Technology

6.         Ng, Jacky                      Ph.D.        6/2010       Low Voltage Power MOSFET with Improved6UIS Performance

7.         Sun, Jingmeng                M.Phil1     2009A       Novel Isolation Structure with Good Thermal Dissipation

8.         Ng, Jacky                      M.Phil.      8/2006       Channel Performance Characterization of Trench VDMOS Transistors

9.         Jiang, Xing Chuan          M.Phil       8/2007       A Novel Isolation Structure for Automotive Electronics Applications

10.       Guan, Lingpeng              Ph.D.        8/2006       Low Voltage Power Transistors for High Speed, Power Management Applications

11.       Xiong, Zhibin                 Ph.D         8/2005       Novel High Reliability TFT Transistors

12.       Liu, Haitao                     Ph.D.        7/2003       Novel 3D CMOS and BiCMOS Devices for High Speed and High Density ULSI Applications

13.       Kumar, Mahender          Ph.D.        8/2001       3-D SOI BiCMOS Technologies with Excellent Cross-Talk Isolation for RF System-on-a-Chip Applications

14.       Zhu, Chunxiang              Ph.D.        1/01           Novel Low Temperature Poly-Si TFTs for System-On-Glass Applications

15.       Tan, Yue                        Ph.D.        11/00         SOI RF Integrated Power Amplifier for Wireless Communication Applications

16.       Kumar, Anish                 Ph.D.        8/1997       Polyerystalline Silicon Conductivity Modulated Thin Film Transistors

17.       Chan, Wai Tein              M.Phil.      1/1996       An Effective Cross-Talk Isolation Structure for Power IC Applications

18.       Lai, Tommy Mau Lam    M.Phil.      5/1995       Implementation of Linear Doping Profiles for High Voltage Thin-Film SOI Devices


*        Postdoctoral Fellows

Cai Jun                 Novel Trench IGBT and SOI LDMOS Devices
Chen Qufei           Advanced Power Semiconductor Devices
Huang Qing An    
Advanced Materials and Devices Modeling
Wang Baoping
      Field Emission Display Devices and Technology
Gao Yu Ming        MOS Controlled Thyristors
Shi Longxing         Power Integrated Circuits and Systems
Zhao Shanqi          Bi-directional Power Semiconductor Devices
Feng Chuguang
     Bi-directional and advanced IGBT Devices
Wang Xin             COOLMOS and Advanced High Voltage Bipolar Devices
Yang Bingliang    Power Semiconductor Devices and Technologies
Wu Yu                  Power Semiconductor Devices and Technologies
Cheng Xu             Power Semiconductor Devices and Technologies

*        Research Assistants

Huang Zhong Ping        Field Emission Display Devices and Technology

Chen Ke                      Power Devices for DC-DC Converters
Zhang Sheng Dong
       SOI and TFT Devices and Technology
Li Jian Nian
                  Polysilicon TFT Circuits on Glass
Zeng Xiangbin
              TFT Devices and Technology
You Bodong
                 Advanced Power Semiconductor Devices